1. Field of the Invention
The present invention relates to a semiconductor process. More particularly, the present invention relates to a method for forming a nitrided tunnel oxide layer of non-volatile memory.
2. Description of the Related Art
As a result of the continuous reduction of the price per unit memory size, electrically erasable programmable read-only memory (EEPROM) devices are more often used as non-volatile storage devices. One essential part of an EEPROM cell is the tunnel oxide layer, which should be sufficiently thin so that carriers can tunnel through under a high electric field. The quality and stability of the tunnel oxide layer are also important issues, since the charge retention capability and other important characteristics of an EEPROM device is closely related to these properties.
There have been many methods provided for improving the quality and stability of a tunnel oxide, wherein most of these methods utilize nitrogen doping in silicon oxide. For example, U.S. Pat. No. 5,885,870 patent and U.S. Pat. No. 6,380,033 patent disclose a method for forming a nitrided tunnel oxide layer, wherein NO or N2O-annealing is performed to nitridate a tunnel oxide layer. With the NO or N2O-annealing treatment, the leakage current induced by negative Fowler-Nordheim stress (negative FN-SILC) and the threshold voltage (Vt) shift of an EEPROM device can be reduced. However, the method cannot effectively reduce the leakage current induced by a positive FN stress (positive FN-SILC), and the distribution window of the incorporated nitrogen atoms is small in accordance to this method. Moreover, nitrogen atoms tend to pile up at the bottom interface of the tunnel oxide layer according to this method, so that the carrier mobility and the integrity of the periphery gate oxide of the EEPROM device are degraded.
In addition, the U.S. Pat. No. 6,559,007 patent discloses another method for forming a nitrided tunnel oxide layer, wherein NH3-anealing is performed to nitridate a tunnel oxide layer for inhibiting diffusion of hydroxyl and hydrogen species in the tunnel oxide layer. However, the integrated process in this method is quite complicated, and the distribution window of the incorporated nitrogen atoms is small as in the case of NO or N2O-annealing. Similarly, nitrogen atoms also tend to pile up at the bottom interface of the tunnel oxide layer according to this method. Meanwhile that the carrier mobility and the integrity of the periphery gate oxide of the EEPROM device are degraded.
On the other hand, the U.S. Pat. No. 6,551,948 patent discloses a method for forming an oxynitride film in inter-poly dielectric applications, wherein a polysilicon film is exposed to plasma formed by exciting a mixed gas containing oxygen and nitrogen. In addition, the U.S. Pat. No. 6,413,881 and U.S. Pat. No. 6,548,366 patents disclose methods for forming an ultra-thin gate oxide layer, wherein nitrogen plasma is used to nitridate an ultra-thin gate oxide layer for inhibiting impurity diffusion.